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UART pins to unpowered MCU?
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$begingroup$
I'm using a USB-UART IC with an MCU, which is powered from a battery.
The USB-UART IC is powered from USB connector, not from the battery, so that I don't need to open up a console every time when the switch goes off and on.
simulate this circuit – Schematic created using CircuitLab
edit: I didn't draw it on the figure but the IC has an internal 3.3V regulator and every VDD is on the 3.3V level when the switch is on.
Now I'm worried about when the USB is plugged and the switch is still off.
The MCU document says that every input pin's maximum rating is VDD + 0.3, which would be 0.3 V when the MCU is not powered.
If the TX/RX pair on the USB-UART side goes high, will it destroy the pins on the MCU side?
If so, What do I need between the TX/RX pairs?
microcontroller power uart
New contributor
$endgroup$
|
show 4 more comments
$begingroup$
I'm using a USB-UART IC with an MCU, which is powered from a battery.
The USB-UART IC is powered from USB connector, not from the battery, so that I don't need to open up a console every time when the switch goes off and on.
simulate this circuit – Schematic created using CircuitLab
edit: I didn't draw it on the figure but the IC has an internal 3.3V regulator and every VDD is on the 3.3V level when the switch is on.
Now I'm worried about when the USB is plugged and the switch is still off.
The MCU document says that every input pin's maximum rating is VDD + 0.3, which would be 0.3 V when the MCU is not powered.
If the TX/RX pair on the USB-UART side goes high, will it destroy the pins on the MCU side?
If so, What do I need between the TX/RX pairs?
microcontroller power uart
New contributor
$endgroup$
$begingroup$
@Toor What does "tbh" mean?
$endgroup$
– Elliot Alderson
6 hours ago
1
$begingroup$
It'll probably be okay.The gates can should be able to tolerate up to their maximum operating voltage anyways since they need to be able to do that to function at the top end of their supply voltage range. The Vdd+0.3 is in reference to the ESD clamp diodes in the MCU, but if the MCU is unpowered, those diodes don't have a rail to clamp to. If a 5V capable MCU was being powered off 3V and you applied 5V to an I/O, those diodes would try and clamp to the 3.3V rail, but that doesn't mean it would blow without them at 5V. You can use series resistors to limit the current through said diodes.
$endgroup$
– Toor
6 hours ago
$begingroup$
@ElliotAlderson "tbh" is a common internet-ism for "to be honest".
$endgroup$
– Hearth
6 hours ago
5
$begingroup$
@Toor The diodes will create a power rail; see youtube.com/watch?v=2yFh7Vv0Paw.
$endgroup$
– CL.
6 hours ago
3
$begingroup$
This can indeed be an issue - not only the theoretical risk of damage but there are parts that won't do a clean power on reset if they were previously "sorta" powered by I/Os before real power was applied. If you find the board power net getting pulled up to .5v - .6v when "off" you may be in trouble territory.
$endgroup$
– Chris Stratton
6 hours ago
|
show 4 more comments
$begingroup$
I'm using a USB-UART IC with an MCU, which is powered from a battery.
The USB-UART IC is powered from USB connector, not from the battery, so that I don't need to open up a console every time when the switch goes off and on.
simulate this circuit – Schematic created using CircuitLab
edit: I didn't draw it on the figure but the IC has an internal 3.3V regulator and every VDD is on the 3.3V level when the switch is on.
Now I'm worried about when the USB is plugged and the switch is still off.
The MCU document says that every input pin's maximum rating is VDD + 0.3, which would be 0.3 V when the MCU is not powered.
If the TX/RX pair on the USB-UART side goes high, will it destroy the pins on the MCU side?
If so, What do I need between the TX/RX pairs?
microcontroller power uart
New contributor
$endgroup$
I'm using a USB-UART IC with an MCU, which is powered from a battery.
The USB-UART IC is powered from USB connector, not from the battery, so that I don't need to open up a console every time when the switch goes off and on.
simulate this circuit – Schematic created using CircuitLab
edit: I didn't draw it on the figure but the IC has an internal 3.3V regulator and every VDD is on the 3.3V level when the switch is on.
Now I'm worried about when the USB is plugged and the switch is still off.
The MCU document says that every input pin's maximum rating is VDD + 0.3, which would be 0.3 V when the MCU is not powered.
If the TX/RX pair on the USB-UART side goes high, will it destroy the pins on the MCU side?
If so, What do I need between the TX/RX pairs?
microcontroller power uart
microcontroller power uart
New contributor
New contributor
edited 6 hours ago
Inbae Jeong
New contributor
asked 6 hours ago
Inbae JeongInbae Jeong
1334
1334
New contributor
New contributor
$begingroup$
@Toor What does "tbh" mean?
$endgroup$
– Elliot Alderson
6 hours ago
1
$begingroup$
It'll probably be okay.The gates can should be able to tolerate up to their maximum operating voltage anyways since they need to be able to do that to function at the top end of their supply voltage range. The Vdd+0.3 is in reference to the ESD clamp diodes in the MCU, but if the MCU is unpowered, those diodes don't have a rail to clamp to. If a 5V capable MCU was being powered off 3V and you applied 5V to an I/O, those diodes would try and clamp to the 3.3V rail, but that doesn't mean it would blow without them at 5V. You can use series resistors to limit the current through said diodes.
$endgroup$
– Toor
6 hours ago
$begingroup$
@ElliotAlderson "tbh" is a common internet-ism for "to be honest".
$endgroup$
– Hearth
6 hours ago
5
$begingroup$
@Toor The diodes will create a power rail; see youtube.com/watch?v=2yFh7Vv0Paw.
$endgroup$
– CL.
6 hours ago
3
$begingroup$
This can indeed be an issue - not only the theoretical risk of damage but there are parts that won't do a clean power on reset if they were previously "sorta" powered by I/Os before real power was applied. If you find the board power net getting pulled up to .5v - .6v when "off" you may be in trouble territory.
$endgroup$
– Chris Stratton
6 hours ago
|
show 4 more comments
$begingroup$
@Toor What does "tbh" mean?
$endgroup$
– Elliot Alderson
6 hours ago
1
$begingroup$
It'll probably be okay.The gates can should be able to tolerate up to their maximum operating voltage anyways since they need to be able to do that to function at the top end of their supply voltage range. The Vdd+0.3 is in reference to the ESD clamp diodes in the MCU, but if the MCU is unpowered, those diodes don't have a rail to clamp to. If a 5V capable MCU was being powered off 3V and you applied 5V to an I/O, those diodes would try and clamp to the 3.3V rail, but that doesn't mean it would blow without them at 5V. You can use series resistors to limit the current through said diodes.
$endgroup$
– Toor
6 hours ago
$begingroup$
@ElliotAlderson "tbh" is a common internet-ism for "to be honest".
$endgroup$
– Hearth
6 hours ago
5
$begingroup$
@Toor The diodes will create a power rail; see youtube.com/watch?v=2yFh7Vv0Paw.
$endgroup$
– CL.
6 hours ago
3
$begingroup$
This can indeed be an issue - not only the theoretical risk of damage but there are parts that won't do a clean power on reset if they were previously "sorta" powered by I/Os before real power was applied. If you find the board power net getting pulled up to .5v - .6v when "off" you may be in trouble territory.
$endgroup$
– Chris Stratton
6 hours ago
$begingroup$
@Toor What does "tbh" mean?
$endgroup$
– Elliot Alderson
6 hours ago
$begingroup$
@Toor What does "tbh" mean?
$endgroup$
– Elliot Alderson
6 hours ago
1
1
$begingroup$
It'll probably be okay.The gates can should be able to tolerate up to their maximum operating voltage anyways since they need to be able to do that to function at the top end of their supply voltage range. The Vdd+0.3 is in reference to the ESD clamp diodes in the MCU, but if the MCU is unpowered, those diodes don't have a rail to clamp to. If a 5V capable MCU was being powered off 3V and you applied 5V to an I/O, those diodes would try and clamp to the 3.3V rail, but that doesn't mean it would blow without them at 5V. You can use series resistors to limit the current through said diodes.
$endgroup$
– Toor
6 hours ago
$begingroup$
It'll probably be okay.The gates can should be able to tolerate up to their maximum operating voltage anyways since they need to be able to do that to function at the top end of their supply voltage range. The Vdd+0.3 is in reference to the ESD clamp diodes in the MCU, but if the MCU is unpowered, those diodes don't have a rail to clamp to. If a 5V capable MCU was being powered off 3V and you applied 5V to an I/O, those diodes would try and clamp to the 3.3V rail, but that doesn't mean it would blow without them at 5V. You can use series resistors to limit the current through said diodes.
$endgroup$
– Toor
6 hours ago
$begingroup$
@ElliotAlderson "tbh" is a common internet-ism for "to be honest".
$endgroup$
– Hearth
6 hours ago
$begingroup$
@ElliotAlderson "tbh" is a common internet-ism for "to be honest".
$endgroup$
– Hearth
6 hours ago
5
5
$begingroup$
@Toor The diodes will create a power rail; see youtube.com/watch?v=2yFh7Vv0Paw.
$endgroup$
– CL.
6 hours ago
$begingroup$
@Toor The diodes will create a power rail; see youtube.com/watch?v=2yFh7Vv0Paw.
$endgroup$
– CL.
6 hours ago
3
3
$begingroup$
This can indeed be an issue - not only the theoretical risk of damage but there are parts that won't do a clean power on reset if they were previously "sorta" powered by I/Os before real power was applied. If you find the board power net getting pulled up to .5v - .6v when "off" you may be in trouble territory.
$endgroup$
– Chris Stratton
6 hours ago
$begingroup$
This can indeed be an issue - not only the theoretical risk of damage but there are parts that won't do a clean power on reset if they were previously "sorta" powered by I/Os before real power was applied. If you find the board power net getting pulled up to .5v - .6v when "off" you may be in trouble territory.
$endgroup$
– Chris Stratton
6 hours ago
|
show 4 more comments
2 Answers
2
active
oldest
votes
$begingroup$
It depends on the MCU, but in most cases it'll power up the MCU, and possibly the rest of the board through the MCU. The MCU will try to run, and do odd things. Your board will do odder things. If your board draws enough current, it'll damage that pin on the MCU.
You need to arrange for the UART signal to stay at 0V when the MCU is off. If the UART chip (or UART) that you are using doesn't have an enable pin (the USB UART chips that I've worked with can be configured for exactly the case you're describing), then AND the UART outputs with the microprocessor's VCC.
$endgroup$
add a comment |
$begingroup$
Easy solution is to put some resistors between the I/O pins. This will limit the current flow into the pins so the transceiver cannot power the uC. The resistor value is a balance between limiting the bandwidth between the chips and limiting the current.
Logic buffers powered by the USB but with outputs enabled by the uC. This does the same as the transceiver output enable of the other answer.
Is there an advantage to having the uC off when it's connected to the computer? If not you can power the uC from the 5 V USB power. Ways to do this are:
- An SPDT switch that selects USB power when battery power is off. Replaces the SPST switch in your circuit diagram.
- A diode, diodes, an ideal diode integrated circuit, or MOSFETs controlled by the uC to select USB power when available. Now you need to consider what happens when the battery switch is closed and the USB is connected. Uncontrolled battery changing is rarely a good thing.
$endgroup$
add a comment |
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2 Answers
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2 Answers
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active
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$begingroup$
It depends on the MCU, but in most cases it'll power up the MCU, and possibly the rest of the board through the MCU. The MCU will try to run, and do odd things. Your board will do odder things. If your board draws enough current, it'll damage that pin on the MCU.
You need to arrange for the UART signal to stay at 0V when the MCU is off. If the UART chip (or UART) that you are using doesn't have an enable pin (the USB UART chips that I've worked with can be configured for exactly the case you're describing), then AND the UART outputs with the microprocessor's VCC.
$endgroup$
add a comment |
$begingroup$
It depends on the MCU, but in most cases it'll power up the MCU, and possibly the rest of the board through the MCU. The MCU will try to run, and do odd things. Your board will do odder things. If your board draws enough current, it'll damage that pin on the MCU.
You need to arrange for the UART signal to stay at 0V when the MCU is off. If the UART chip (or UART) that you are using doesn't have an enable pin (the USB UART chips that I've worked with can be configured for exactly the case you're describing), then AND the UART outputs with the microprocessor's VCC.
$endgroup$
add a comment |
$begingroup$
It depends on the MCU, but in most cases it'll power up the MCU, and possibly the rest of the board through the MCU. The MCU will try to run, and do odd things. Your board will do odder things. If your board draws enough current, it'll damage that pin on the MCU.
You need to arrange for the UART signal to stay at 0V when the MCU is off. If the UART chip (or UART) that you are using doesn't have an enable pin (the USB UART chips that I've worked with can be configured for exactly the case you're describing), then AND the UART outputs with the microprocessor's VCC.
$endgroup$
It depends on the MCU, but in most cases it'll power up the MCU, and possibly the rest of the board through the MCU. The MCU will try to run, and do odd things. Your board will do odder things. If your board draws enough current, it'll damage that pin on the MCU.
You need to arrange for the UART signal to stay at 0V when the MCU is off. If the UART chip (or UART) that you are using doesn't have an enable pin (the USB UART chips that I've worked with can be configured for exactly the case you're describing), then AND the UART outputs with the microprocessor's VCC.
answered 3 hours ago
TimWescottTimWescott
5,7821414
5,7821414
add a comment |
add a comment |
$begingroup$
Easy solution is to put some resistors between the I/O pins. This will limit the current flow into the pins so the transceiver cannot power the uC. The resistor value is a balance between limiting the bandwidth between the chips and limiting the current.
Logic buffers powered by the USB but with outputs enabled by the uC. This does the same as the transceiver output enable of the other answer.
Is there an advantage to having the uC off when it's connected to the computer? If not you can power the uC from the 5 V USB power. Ways to do this are:
- An SPDT switch that selects USB power when battery power is off. Replaces the SPST switch in your circuit diagram.
- A diode, diodes, an ideal diode integrated circuit, or MOSFETs controlled by the uC to select USB power when available. Now you need to consider what happens when the battery switch is closed and the USB is connected. Uncontrolled battery changing is rarely a good thing.
$endgroup$
add a comment |
$begingroup$
Easy solution is to put some resistors between the I/O pins. This will limit the current flow into the pins so the transceiver cannot power the uC. The resistor value is a balance between limiting the bandwidth between the chips and limiting the current.
Logic buffers powered by the USB but with outputs enabled by the uC. This does the same as the transceiver output enable of the other answer.
Is there an advantage to having the uC off when it's connected to the computer? If not you can power the uC from the 5 V USB power. Ways to do this are:
- An SPDT switch that selects USB power when battery power is off. Replaces the SPST switch in your circuit diagram.
- A diode, diodes, an ideal diode integrated circuit, or MOSFETs controlled by the uC to select USB power when available. Now you need to consider what happens when the battery switch is closed and the USB is connected. Uncontrolled battery changing is rarely a good thing.
$endgroup$
add a comment |
$begingroup$
Easy solution is to put some resistors between the I/O pins. This will limit the current flow into the pins so the transceiver cannot power the uC. The resistor value is a balance between limiting the bandwidth between the chips and limiting the current.
Logic buffers powered by the USB but with outputs enabled by the uC. This does the same as the transceiver output enable of the other answer.
Is there an advantage to having the uC off when it's connected to the computer? If not you can power the uC from the 5 V USB power. Ways to do this are:
- An SPDT switch that selects USB power when battery power is off. Replaces the SPST switch in your circuit diagram.
- A diode, diodes, an ideal diode integrated circuit, or MOSFETs controlled by the uC to select USB power when available. Now you need to consider what happens when the battery switch is closed and the USB is connected. Uncontrolled battery changing is rarely a good thing.
$endgroup$
Easy solution is to put some resistors between the I/O pins. This will limit the current flow into the pins so the transceiver cannot power the uC. The resistor value is a balance between limiting the bandwidth between the chips and limiting the current.
Logic buffers powered by the USB but with outputs enabled by the uC. This does the same as the transceiver output enable of the other answer.
Is there an advantage to having the uC off when it's connected to the computer? If not you can power the uC from the 5 V USB power. Ways to do this are:
- An SPDT switch that selects USB power when battery power is off. Replaces the SPST switch in your circuit diagram.
- A diode, diodes, an ideal diode integrated circuit, or MOSFETs controlled by the uC to select USB power when available. Now you need to consider what happens when the battery switch is closed and the USB is connected. Uncontrolled battery changing is rarely a good thing.
answered 12 mins ago
jherboldjherbold
963
963
add a comment |
add a comment |
Inbae Jeong is a new contributor. Be nice, and check out our Code of Conduct.
Inbae Jeong is a new contributor. Be nice, and check out our Code of Conduct.
Inbae Jeong is a new contributor. Be nice, and check out our Code of Conduct.
Inbae Jeong is a new contributor. Be nice, and check out our Code of Conduct.
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$begingroup$
@Toor What does "tbh" mean?
$endgroup$
– Elliot Alderson
6 hours ago
1
$begingroup$
It'll probably be okay.The gates can should be able to tolerate up to their maximum operating voltage anyways since they need to be able to do that to function at the top end of their supply voltage range. The Vdd+0.3 is in reference to the ESD clamp diodes in the MCU, but if the MCU is unpowered, those diodes don't have a rail to clamp to. If a 5V capable MCU was being powered off 3V and you applied 5V to an I/O, those diodes would try and clamp to the 3.3V rail, but that doesn't mean it would blow without them at 5V. You can use series resistors to limit the current through said diodes.
$endgroup$
– Toor
6 hours ago
$begingroup$
@ElliotAlderson "tbh" is a common internet-ism for "to be honest".
$endgroup$
– Hearth
6 hours ago
5
$begingroup$
@Toor The diodes will create a power rail; see youtube.com/watch?v=2yFh7Vv0Paw.
$endgroup$
– CL.
6 hours ago
3
$begingroup$
This can indeed be an issue - not only the theoretical risk of damage but there are parts that won't do a clean power on reset if they were previously "sorta" powered by I/Os before real power was applied. If you find the board power net getting pulled up to .5v - .6v when "off" you may be in trouble territory.
$endgroup$
– Chris Stratton
6 hours ago